在一個(gè)掃描周期內(nèi)同步兩兩次:第一-次在邏輯執(zhí)行之前，第二次在執(zhí)行后。CPU的錯(cuò)誤，比如說(shuō)進(jìn)入-一個(gè)死循環(huán)，會(huì)被另–個(gè)同步的CPU發(fā)現(xiàn)并認(rèn)為同步將失敗。另一個(gè)CPU等待本CPU執(zhí)行的時(shí)間被定義為“失敗等待時(shí)間”。此時(shí)間的長(zhǎng)度必須在首要單元和次要單元中被配置，時(shí)間的長(zhǎng)度可以在60ms到400ms之間，以10ms為增量，默認(rèn)是60ms。

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